With the rapid development of semiconductor technologies, the feature size of semiconductor devices continues to decrease, making the integration degree of integrated circuits higher and higher. This also sets higher requirements for the performance of devices.
At present, as the size of the metal oxide semiconductor field effect transistor (MOSFET) becomes smaller, the channel length of the MOSFET needs to be continuously shortened to adapt to a reduced process node. A shorter channel length is advantageous to increase the die density of a chip and increase the switching speed of a MOSFET.
However, when the channel length of devices becomes shorter, the distance between the source and drain of devices is also shortened. Therefore, the controlling capability of gate to channel is degraded and the pinch off of channel by the gate voltage becomes more difficult, causing a subthreshold leakage current phenomenon. That is, the short-channel effects (SCEs) can occur more easily, which has become a crucial technical issue.
To better adapt to a scaled-down size of devices, semiconductor technologies are gradually developed from the planar MOSFET to the more efficient three-dimensional transistors, such as fin field effect transistor (FinFET) with better channel controlling capabilities.
A FinFET device often includes a core device and an input/output (TO) device. Because the working current of an IO device is relatively large, the gate leakage current phenomenon is more likely to occur in a FinFET device.
Therefore, there is a need to resolve the gate leakage current problem of semiconductor devices and to improve the reliability of semiconductor devices. The disclosed device and method are directed to solve one or more problems set forth above and other problems in the art.